TSMC Investors' Top 10 Questions Analyzed: AI Demand, Capacity Expansion, and Competitive Landscape

With Tesla's announcement of the TeraFab self-built chip plant program as the latest landmark event, combined with concerns over liquefied natural gas supply due to Middle East tensions and the gradual catch-up of Intel and Samsung's process technologies, TSMC’s competitive and supply chain environment is becoming increasingly complex.

According to Windy Trading Desk, JPMorgan systematically addressed the ten most pressing questions from investors in its latest research report on March 24. These covered capital expenditure path, capacity planning, competitive landscape, packaging strategy, and supply chain risks, providing a comprehensive fundamental assessment framework for the market.

JPMorgan maintains its Overweight rating on TSMC with a target price of NT$2,250. The bank expects TSMC’s U.S. dollar revenue to grow by more than 30% by 2026, with core drivers including strong N3 demand, accelerated N2 ramp-up, advanced packaging expansion, and a significant increase in blended average selling prices.

In the latest AI revenue growth forecast, TSMC has raised the compound annual growth rate guidance for AI revenue during 2024-2029 from the previous mid-40% to the upper 50% range. Meanwhile, JPMorgan predicts capital expenditures may break through $60 billion in 2027 and approach $70 billion in 2028.

Significant Jump in Capital Expenditure, Extended Capacity Ramp Cycle

JPMorgan believes TSMC’s capital expenditure is entering a new upward inflection point. The 2026 guidance of $52 to $56 billion represents a sharp increase from previous years, and the company has clearly stated that capital expenditure over the next three years will be "significantly higher" than the past three years. The bank estimates that capacity growth will accelerate from the previous 4%-5% to high single digits or even around 10%.

The capacity expansion pipeline spans multiple nodes and locations:

N3 node includes Tainan Fab 18 P9 in Taiwan, Arizona P2, and Japan P2;

N2 node is mainly planned for Kaohsiung P1 to P5, with potential for Tainan Fab 18 P10 to P12 in Taiwan;

A14/A10 nodes correspond to Kaohsiung P6 to P8 and Taichung facilities in Taiwan;

TSMC also plans a brand new Phase 8 campus in Tainan, Taiwan, dedicated to A10 and future process nodes.

Notably, the cycle from capital expenditure to actual capacity release is lengthening. JPMorgan points out that current spending on the most advanced nodes will not convert to effective capacity until 2028 at the earliest—this is because the wafer output per unit cleanroom area for N2 is lower than N3, and construction cycles are longer.

Rising Competitive Barriers, Limited Market Share Loss Risk

Regarding market concerns that TSMC may cede market space to rivals due to a conservative expansion pace, JPMorgan's assessment is: market share risk overall is limited.

The bank notes that chip design cycles require at least two to three years, and it takes another one to two years to ramp to mass production at a specific foundry, making the full switching cycle three to five years, with very high conversion costs.

From a technology competitiveness perspective, the bank estimates that Intel 18A’s overall performance currently matches TSMC’s N3E, while Samsung’s 2nm roughly corresponds to TSMC’s 3nm—still a generation behind. TSMC N2 has already entered mass production, while Intel’s 14A PDK v1.0 is expected to be available by late 2026 at the earliest, giving TSMC about a two-year lead in advanced processes.

JPMorgan acknowledges that given ongoing tight advanced process capacity, partnerships between Samsung and Tesla, Intel and CSPs, etc., will continue to draw market attention; however, the bank believes these dynamics will have a limited impact on TSMC’s actual market share.

Shift in Packaging Strategy, Increased Outsourcing Ratio

Regarding advanced packaging, JPMorgan believes TSMC views packaging as an 'enabler' to drive front-end wafer sales rather than an independent profit growth driver, making the company more flexible in its outsourcing strategy.

Specifically, the On-Substrate (oS) technology in CoWoS is expected to be fully outsourced to ASE, and CoW orders are also gradually shifting to OSAT (Outsourced Semiconductor Assembly and Test) providers. JPMorgan also points out that advanced packaging is not a shortcut for competitors like Intel to enter front-end wafer foundry business.

Looking ahead, TSMC’s strategic focus is expected to shift toward CoPoS and 3D-SoIC. As Nvidia may introduce 3D stacking in the Feynman architecture and multiple ASIC customers migrate to N2-based 3D-SoIC, expansion in 3D-SoIC is expected to become a key focus in the next phase.

Due to constraints on land and cleanroom resources, priority between advanced packaging and advanced processes will tilt toward the latter, which will further drive the OSAT outsourcing ratio higher over the next two to three years.

What is the TeraFab Impact?

Elon Musk recently announced the TeraFab program, aiming to establish a domestic U.S. AI chip production system with a 1-terawatt annual capacity, covering logic, storage, and advanced packaging. JPMorgan views the probability of TeraFab having a material impact on TSMC as currently low.

The bank identifies three major barriers:

First, advanced process technologies are highly concentrated, with only TSMC, Intel, and Samsung having production-proven advanced nodes—IBM only provides lab-level process roadmaps;

Second, moving from process development to mass production requires substantial engineering accumulation, involving equipment, EDA, materials, chemicals, and multiple supply chain segments, with yield costs at each of hundreds of manufacturing steps;

Third, a 100,000 wafers/month N2 fab would require $50-60 billion in current investment, plus ongoing R&D spending to maintain cross-generational technological leadership.

JPMorgan points out that in semiconductors, technological innovation (such as FinFET, GAA, EUV, etc.) usually requires 15-20 years from laboratory to mass production. Whether this cycle can be dramatically shortened is the critical variable. Although Musk has a track record of exceptional execution, the bank believes disrupting the status quo would require a true physical-layer breakthrough.

Capacity Node Planning and EUV Procurement

For specific capacity numbers, JPMorgan estimates N3 capacity could reach 165,000 to 170,000 wafers/month by year-end, higher than the previous baseline of around 150,000 wafers/month, mainly benefiting from migrating N7 and 28nm capacity at Fab 15, as well as early ramp-up at Fab 18 P9.

Looking ahead to 2028, as Fab 18 P9 fully ramps, Arizona P2 enters volume production in H2 2027, and with contributions from Japan P2 and new sites (Fab 18 P10 to P12), total N3 capacity could exceed 200,000 wafers/month.

For N2, capacity is expected to reach about 100,000 wafers/month by end-2026, and could expand to 200,000–240,000 wafers/month in the next three years, with Kaohsiung P1–P5 and Arizona P3 as the main drivers.

Regarding EUV equipment procurement, JPMorgan expects TSMC to purchase 29–31 units in 2026, up from 21–23 units in 2025. Importantly, High-NA EUV will not be used for N2, A16, or A14 nodes but is expected to be introduced with the A10 node (around 2030–2031) at the earliest.

Gross Margin Outlook and Supply Chain Risk

JPMorgan expects TSMC’s gross margin in H1 2026 to approach the upper-60% to 70% range, benefiting from strong advanced node demand, increased share of hot-run and super hot-run orders, favorable NT$ FX rates, and ongoing redeployment of idle N7/28nm capacity toward advanced nodes. Depreciation expenses are also expected to rise slower than revenue (19% vs. over 30% revenue growth for 2026).

On risk, approximately 48% of Taiwan's electricity relies on liquefied natural gas (LNG), with about 33% of LNG imports from Qatar, while local storage capacity covers only about 11–15 days.

Due to Middle East tensions, rising energy costs represent the main margin pressure in H2 2026, with peak risks concentrated in the summer electricity peak (August–September). JPMorgan believes that, given the strategic importance of the semiconductor industry, the probability of actual production disruption is low, and Taiwan is expected to prioritize industrial power supply.

Regarding shortages of specialty gases such as helium, JPMorgan research shows TSMC currently has over one month of inventory and is actively sourcing from alternative channels (with a 2–4x cost premium), while also raising gas recycling rates, which is expected to safely address outage pressures.

Blended Average Selling Prices Expected to Continue Rising

On pricing, JPMorgan notes that recent market news of price hikes is actually a repeated interpretation of the previously negotiated 6%–10% increase for advanced nodes in 2026 (discussed in Q3 2025, effective January 2026), not a new round of across-the-board hikes.

But blended average selling prices continue to rise—the increasing proportion of rush orders (50%/100% premium), HPC customers becoming the main force of N3 demand, and more customers preferring multi-year pricing agreements, together are driving TSMC’s blended average price up by about 20% in 2026.

Regarding Co-Packaged Optics (CPO), JPMorgan believes the direct contribution of CPO to TSMC’s revenue will be quite limited since the related building block costs are far below the advanced node wafer averages (HPC N3 wafer is about $26,000–$30,000); OSAT partners and testing ecosystems will benefit more from CPO scale-up.

JPMorgan assigns TSMC a December 2026 target price of NT$2,250 based on a 12-month forward PE ratio of around 20x, higher than the five-year historical average, reflecting the bank’s positive expectation for AI-driven fundamentals.