Micron executive: Storage determines AI limits, substantial new capacity will not be available until after 2028

As the AI wave spreads from data centers to the edge and robotics fields, Micron executives have warned that storage has become the most critical bottleneck defining the upper limit of AI performance. Given the long construction cycles for new capacity and extremely complex processes, a substantial release of new capacity in the industry’s supply-demand imbalance is unlikely to be realized until after 2028 at the earliest.

On September 15th, at the semiconductor-focused forum of the Six Five Summit 2026, Sumit Sadana, Senior Advisor to the CEO of Micron, was interviewed by analyst Patrick Moorhead, offering a detailed analysis of the AI-era storage industry’s supply and demand, CapEx plans, and core incremental markets for the future.

Throughout the past year, the entire tech industry has fundamentally reshaped its understanding of storage. The root reason is that computational power is no longer the sole metric for AI system capability. In the interview, Sadana bluntly pointed out the current underlying logic of AI hardware: “Today, the performance of AI systems is determined first and foremost by the performance and capacity of the memory subsystem. These two factors truly define the performance level of the AI subsystem.”

He explained that since AI models must be stored in memory and vast amounts of data must be transmitted back and forth between memories, the bandwidth between processor and memory has become the key performance bottleneck. At the same time, the storage market is facing a structural imbalance accumulated over decades—there were over 20 DRAM companies in the early 1990s, and only a handful remain today, while there are already over 20 processor design companies. This “few-to-many” funnel-shaped supply structure makes the storage supply chain especially fragile in the face of explosive AI demand.

Capital Expenditures Soar, Substantial New Supply Must Wait Until 2028

Faced with an enormous supply-demand gap, bit growth from technological transition alone is no longer sufficient to satisfy the market; the industry as a whole is forced into a heavy asset “new clean room and wafer fab” expansion cycle.

Micron is embarking on an unprecedented capital expenditure plan. Sadana revealed: “Looking at our CapEx plan alone: for FY2025, our CapEx is slightly above $13 billion; in FY2026, it will double; for FY2027, it is expected to exceed $45 billion. We recently announced in the US that our investment would increase from $200 billion to $250 billion, and the timeline is accelerating.” In addition, Micron is simultaneously advancing about 20 expansion projects in places like Idaho, New York, Taiwan, Japan, and Singapore.

However, distant water cannot quench present thirst. Semiconductor fab construction is constrained by infrastructure, regulatory approval, and an acute shortage of skilled workers. Sadana provided a clear timetable: “We believe that genuinely effective new supply will only start to be released gradually in 2028, and that will be just the initial phase. The momentum for capacity growth will only strengthen in subsequent years. Therefore, it will take time for the entire industry to find a new equilibrium.”

Another major reason for slow capacity release is the astronomical complexity of memory manufacturing. Take today’s popular HBM as an example; Sadana said it's “almost a miracle” it works: “Think about it, stacking twelve layers of DRAM chips, with a base die at the bottom connected to the GPU. The entire system faces severe thermal challenges and power issues... There are about 2,000 process steps in a fab. From the start of fab production to final delivery to the customer, the entire process takes about five months.”

Farewell to “Buy as Needed”—Long-Term Contracts and Deep Customization Reshape Business Models

Extremely tight capacity is forcing a transformation of the storage industry’s business model. The age of spot trading and universal chips conforming to JEDEC standards is changing.

“We are signing multi-year contracts, committing to supply customers while customers commit to providing demand forecasts. This is completely different from the previous one-year agreements—customers used to buy as they wished, and as long as we had inventory, we would supply.” Sadana said this model, known as “strategic customer agreements,” offers extremely high ROI, providing fundamental support for years of CapEx.

The change is even deeper in R&D collaboration. To achieve differentiation in power, model performance speed, etc. in AI systems, customers are incorporating memory design into their 5–7 year product roadmaps. Sadana noted: “This model turns the partnership into something more like ASIC chip collaboration—the customer has much greater design autonomy, and the relationship is long-term.”

AI Moves to the Edge, Humanoid Robots Become the Biggest Incremental Market

The market typically focuses on AI demand in data centers, but Micron believes this is just the beginning. As AI penetrates smartphones, PCs (such as Mac mini with unified memory architecture), and autonomous vehicles, the need for storage will become ubiquitous.

As for the imagination space for the future, Sadana is eyeing the robotics track, predicting it will bring another massive wave of demand after data centers.

“Think about humanoid robots—they will become one of the largest product markets in history.” Sadana stressed the terrifying consumption of storage at the edge by AI in the 2030s: “The most exciting part about robotics is that every device will need to store massive amounts of data—each humanoid robot will have hundreds of GB of DRAM and several TB of NAND flash. Thus, they will greatly drive up DRAM and NAND demand... Robots must run independently and cannot send data to the server every time.”

The following is the interview transcript:

Sumit Sadana 00:00 (UTC+8)

Today, the performance of AI systems depends first on the performance and capacity of the memory subsystem. These two factors truly determine the performance level of AI subsystems. Welcome back to the 2026 Summit.

Patrick Moorhead 00:22 (UTC+8)

The age of AI has arrived. The importance and strategic value of memory are astounding. I’ve always believed memory was important, but considering the AI era, the capabilities it enables are simply incredible—frankly, without enough and suitable memory, all the amazing things happening around us would be impossible.

I’m delighted to announce that Micron is attending this Summit. Great to see you, glad you’re back. Thank you for the invitation. This is fantastic. I’ve been in this industry for 35 years, from a consumer of memory, to a partner in memory, and now, as an analyst, studying the memory market and all related fields. The achievements are stunning. Last year, when we talked, I actually classified memory as a strategic technology—yes, I take credit for that. Honestly, you deserve more praise because you make things happen, while I just talk. Nowadays, this view seems even more important, with more people discussing it. In this age of AI, what has changed over the past year that has gotten the entire industry to pay more attention to memory?

Sumit Sadana 01:44 (UTC+8)

Why has AI actually accelerated this shift? That’s a great question. A year has passed, but it feels much longer in terms of changes in the world. The changes are especially huge from the customer’s point of view. Now, all market sectors are facing severe memory shortages. Despite our best efforts to increase supply, we still cannot foresee when supply will catch up with demand, because demand keeps growing. Signals from customers in all fields are increasing year by year.

The way customers view memory has changed for several reasons. First, there is a huge supply-demand gap; second, considering AI needs, system performance requirements are also increasing. When you think about what makes a system perform best, you realize the processor is not the only factor. Now, memory performance, bandwidth between processor and memory, and the capacity of memory itself are all critical. Because AI models must be stored in memory, vast amounts of data need to be moved back and forth within memory, and the bandwidth between processor and memory has become a key performance bottleneck. So, customers are gradually realizing they need to rethink product roadmaps and adopt different memory strategies.

Sumit Sadana 03:44 (UTC+8)

Now, the key is: how to design memory for a competitive edge, how to make each customer’s system stand out. If memory were still the same as years ago, using standard off-the-shelf, JEDEC-compliant modules, it would be hard to differentiate. So, now we are working with customers to incorporate memory design into their multi-year product roadmaps. They're focused on differentiation—how to change the competitive landscape. This means thinking about memory in new ways, working with companies like Micron to design and utilize these new features.

Sumit Sadana 04:31 (UTC+8)

For example, our collaboration with Nvidia in the data center low-power DRAM (LPDRAM) field is a good example. We were the first company to introduce this technology to data centers, and have long been its exclusive supplier. Now, it’s being adopted by others. More customers are realizing the advantage of using LPDRAM—it brings higher density, smaller size, stronger performance, and significant power reduction, which are all crucial for data centers. This is just one of many examples.

Patrick Moorhead 05:07 (UTC+8)

Looking ahead to the next five years, these technologies are beginning to flourish. When I try to explain the surging interest in memory, it reminds me of a university course I took—in the late 1980s, the basic principle was: if you can confine operations within memory, you can improve performance. Of course, now it’s a little different. The more memory you have, the better results you get, and the closer the memory is to what you’re processing, the better—once you go out of memory, things slow down. In the AI era, this is a big challenge.

It’s interesting. I’ve lived through nine memory cycles in my career. I worked at an OEM, a chip company, and now, I’ve been at an analyst firm for 15 years. Memory seems the most cyclical, though I know other industries are similar. Memory is also seen as highly commoditized. You already touched on this in the first question, but…

Sumit Sadana 06:17 (UTC+8)

Why is AI fundamentally changing this perception? Good question. Think back to the early 1990s—there were over 20 DRAM companies. The DRAM industry went through massive consolidation. Back then, there were just a handful of processor companies; now, there are over 20. If you count all companies designing processors, the number comes out fast. But for DRAM, just a handful remain.

So, when you think about AI design and AI subsystem design, it’s not limited to data centers—of course, data centers must distinguish between training and inference workloads. Inference itself is splitting into many types. Some can use SRAM, but much still relies on DRAM. We’re designing the largest possible DRAM capacity into these systems. This trend reaches autonomous vehicles, industrial systems, smartphones, and PCs—as seen with the Mac mini’s unified memory structure and the “Open Claw” boom. All of this, at its core, ties back to AI.

Sumit Sadana 07:50 (UTC+8)

Now, system performance first depends on memory subsystem performance and capacity, and these truly determine the AI subsystem. When memory becomes the core system design point, you have to think differently. The key question then is: how do you quickly launch differentiated products? I think future memory business will look totally different than before, closely aligned with the following concept…

Sumit Sadana 08:36 (UTC+8)

The entire industry has inevitably reached the stage of needing new capacity, which is surprising because AI-driven growth is so significant. Technology transitions alone can’t meet this demand anymore, though in recent years, bit growth from technology transition would have sufficed. Now, the industry needs to ramp up wafer output—requiring new cleanroom space. Once current sites run out of cleanroom space—and most have—new plants must expand simultaneously, which takes a long time.

It’s an extremely time-consuming process, and subject to many practical factors like varying speeds of construction worldwide, and regulatory approval efficiency. Setting up all the necessary infrastructure—power, water, water treatment plants—on a greenfield site; chemical supply; everything needed for a fab, all takes considerable time. That’s what the industry is facing.

Sumit Sadana 10:01 (UTC+8)

So, despite our best efforts, and those of our peers, we still can't meet market demand. It takes a long time for supply to catch up with demand, and this also drives another important change in customer behavior.

Sumit Sadana 10:27 (UTC+8) That’s what we’ve been talking about—strategic customer agreements. These fundamentally change our business model and way of operating. We sign multi-year deals, committing to supply, with customers committing to demand forecasts. This is very different from typical one-year deals—before, customers just bought as needed if we had stock. Now, the agreement is a supply commitment, with very high ROI, thus supporting capital expenditure needs years out.

Of course, this hasn’t even touched on agent AI, the next stage of AI development. Then comes physical AI, which will be a huge next wave of demand. If you observe these different waves, you’ll see they’re additive, not substitutive, leading to massive challenges in moving so much physical supply capability online.

Patrick Moorhead 11:39 (UTC+8)

To meet all this demand, I think your long-term supply agreements demonstrate just how strategic memory has become. It’s easy to say “we need long-term plans to lock in future supply,” which is important, but it’s also about collaborative planning.

From a technology standpoint, I’m also really impressed, glad you mentioned edge AI. The most interesting thing is, whether it’s Open Claw or some new client-side computing designs—like tightly integrating memory with CPU and GPU for bandwidth—client computing architecture hasn’t changed much for a long time. Next, I’d like to talk about hyperscale data centers, which we also discussed a bit—there’s huge CapEx and most model/app innovation is there. But I am curious about autonomous vehicles, PCs, robots, smart edge…

Sumit Sadana 13:00 (UTC+8)

Is memory demand changing these application scenarios? Yes, that’s a great question. Of course, it all starts with the data center. But thinking about the future of AI, it won’t be limited to data centers. This smart wave will push to the edge, and ultimately, intelligence will be everywhere, permeating all devices. So it covers every kind of consumer electronics, vehicles, and, of course, even the second wave of the industrial revolution—eventually, all that intelligence will be distributed globally in enterprises.

Sumit Sadana 13:43 (UTC+8)

Your personal devices—office or home computers, your smartphone, even new devices companies are considering—they might look nothing like a phone or PC, entirely new designs. When you consider building a native AI device, you can imagine very different implementations than today’s PCs or smartphones. Again, it comes back to minimizing power—for battery-powered devices, for example. Maximizing performance, running models that are small enough to run on the device and bring consumer value without using the cloud—that’s the new AI frontier.

This exploration will continue. Models small enough to run on a PC or smartphone will improve dramatically over time. As this happens, the advantages of data privacy and confidentiality stand out. Consumers value this highly, and companies that can assure them everything stays on the device—not uploaded to the cloud—will create a whole new realm of applications and value.

Sumit Sadana 15:30 (UTC+8)

Now look at autonomous driving, which is growing rapidly thanks to AI advances; next-gen frontier tech is robotics. Think about humanoid robots—they will become one of the biggest product markets ever. Of course, it will take time, but we’re getting closer to that singularity when you can converse with them indistinguishably from a person. Over time these robots’ physical abilities will get far more sophisticated—a revolutionary achievement.

Initially, they’ll be used for things like factory automation, doing very specific tasks with limited freedom. Once they “graduate” from there, the most complex environment is the home, because it’s highly unstructured. I believe by the 2030s, robotics will be an enormous growth driver. The most exciting aspect is the sheer amount of storage per device—each humanoid robot will have hundreds of GB of DRAM and terabytes of NAND flash. So, they’ll hugely drive demand for DRAM and NAND. I think many people don’t fully appreciate this: robots must operate autonomously and can’t send data back to the server constantly. That’s absolutely true.

Patrick Moorhead 17:25 (UTC+8)

And, as you spoke, I realized Micron is leaping to gigawatt scale. The idea of inventing this technology is mind-boggling. When people think of Micron, they should remember this.

With the arrival of the AI era, strategic vision is more essential than ever—using future devices that aren’t even invented yet, or accessing AI/generative models straight from gigawatt-level data centers launching soon, both are crucial.

I’ve heard of this co-design/co-invention concept, and some of your partners mentioned ideas under exploration. I also touched on architectural changes—previously done through standards like JEDEC. Now, what we’re discussing is true deep co-design. Can you talk about how your relationships with partners are changing?

Sumit Sadana 18:45 (UTC+8)

Absolutely. Our partners also want to figure out how to win in their markets and outperform competitors. The memory-processor subsystem is so critical in AI because memory-processor interaction sets key system parameters—it determines system power, what types of models you can run, their sizes, and speeds.

When you consider all the advances in LLMs—of all sizes and types—differentiation in hardware memory and processor design cycles requires very close collaboration in every vertical. It’s not plug-and-play, not just JEDEC-compliant parts you certify and use. Sometimes that’s true, but increasingly customers ask, “How do I differentiate? I need something special that off-the-shelf products don’t offer.” That’s why we work with memory companies on five-to-seven-year R&D roadmaps. We’re getting even further embedded in customer R&D plans—they propose fascinating ideas, some feasible, some requiring longer to invent breakthroughs.

Sumit Sadana 20:28 (UTC+8)

We’re excited by the diversification we see. As you said, these span a huge range of systems—some ultra-low power for battery devices, others for gigawatt data centers. We’ve already seen innovative results in several leading customers in different verticals, and we’ll keep striving for more.

In some exciting projects, we keep extending our abilities, delivering groundbreaking innovations our customers want. You can’t do this deeply with a dozen companies, so usually it’s just one or two, with others catching up years later. The benefit here is that you can form extremely tight partnerships, become a sole-source supplier or one of two for a period. This hybrid relationship is more like ASIC collaboration—customers have greater design autonomy, and the relationship is long-term. This is because it’s a specialized ASIC-style partnership, not the standardized memory chip collaboration of years ago, and, crucially, this is now scalable to a much wider market.

Patrick Moorhead 22:27 (UTC+8)

That’s right. That scale enables both sides to invest, making differentiation—from performance efficiency to total cost of ownership (TCO)—key for both.

From an investment perspective, let’s look ahead. You mentioned capacity investments. Some expect memory fabs to spring up as fast as writing code. As someone who worked for a chip company with fabs—even today, this remains extremely capital intensive and complex, taking three or four years just to see returns. Can you talk about which of your investments will really secure Micron’s position in next-gen technologies? Whether AI or some variant, these investments take a long time, as you made clear.

Sumit Sadana 23:57 (UTC+8)

You're absolutely right. By the way, if anyone knows how to build a DRAM fab quickly, we would love to know, because it would make our work so much easier. Our customers want product as soon as possible, and we are doing everything we can.

We are doing everything we can to accelerate all these investments. Our CapEx plan alone: for FY2025, slightly over $13 billion; FY2026, it doubles; FY2027, over $45 billion. The number keeps climbing. In the US, we recently increased investment from $200 billion to $250 billion and sped up the timeline, expecting to invest $50.2 billion by the end of next year.

These investments cover everything. We’re investing in Idaho Fab 1 (ID1)—the first production lines will go live; by mid-next year, ID2 will follow with the first wafer lines expected to start in late 2028. The Taiwan fab we acquired will also start wafer output in 2027, with further expansion planned. Our expansions in Japan and Singapore are progressing, so globally we have around 20 investment projects at various scales to increase front-end and back-end capacity.

Sumit Sadana 26:06 (UTC+8)

But it takes a long time. Every new fab does. In New York, we’re planning a cluster of four fabs, with the first expected to start production in 2030. We broke ground in January, and the concrete pouring milestone was completed ahead of schedule.

Sumit Sadana 26:22 (UTC+8)

Many projects are underway worldwide, all needing permits and integrated infrastructure. Skilled construction workers are really in short supply—just look at all ongoing projects in the US and globally.

Data centers are being built everywhere, needing new power plants; and since they need semiconductors, both front- and back-end fabs are under construction. The shortage of skilled workers is tremendous—the number of technical professionals required far outstrips the supply for such complex projects.

Sumit Sadana 27:15 (UTC+8)

So, we’re investing in communities, in talent development, and ensuring a robust talent pipeline—which not only advances our projects, but benefits the entire ecosystem. We’re investing in talent training, building community colleges, and collaborating with towns and communities everywhere we operate. For us, this is a long-term effort.

We expect that facility scale will keep growing, because these fabs operate in cluster mode—you can't just build one. You need scale and need to rapidly cross the cost curve inflection point, so construction will keep going for the next decade or even longer. These are long-term projects. We believe genuinely effective new supply won’t start releasing until 2028, and even then, it will be just the beginning, with serious growth momentum arriving in the years thereafter. Thus, it will take the whole industry some time to find a new balance, but exactly when that will happen, we can’t predict yet.

Patrick Moorhead 28:54 (UTC+8)

Your examples and investment info are great. But I think people may misunderstand the complexity of memory. We all know logic chips are hard. Let’s talk about how complex memory is—it’s one of the most complex semiconductor technologies of all.

Sumit Sadana 29:19 (UTC+8)

We often say logic is at the cutting edge, but storage is truly leading edge too. It uses EUV lithography—giant machines. About 2,000 process steps are in a fab. From starting wafer production to delivery to customers, the cycle is about five months. Amazing, and it’s hard for most people to imagine. Fab cycle at minimum is three and a half to almost four months, then assembly, packaging, and testing can take another one or one and a half months.

Sumit Sadana 30:04 (UTC+8)

For even more complex products, like HBM, the complexity is clear. Many call its functioning a miracle. Think: stacking 12 DRAM layers, with a base die connected to the GPU at the bottom. The whole system faces severe thermal and power challenges—how to run at such high bandwidth and cool efficiently as data moves between chips? The packaging alone is as complex as a cleanroom, totally different from traditional flip-chip packaging in logic. From any angle, whether packaging or process—like EUV—I can say every DRAM node is getting harder to scale.

Sumit Sadana 31:18 (UTC+8)

It’s the same on the NAND side. Now we stack up to 200, 300, 400 layers. The process is astronomically complex. Yet, these NAND products can store data and function—now you can get an SSD with 245TB capacity. Such astonishing capacity in a tiny device is a daily miracle achieved by our engineers and manufacturing teams. The complexity is mind-blowing, and in the coming years we’ll have to keep extending, scaling to ever-smaller pitches and making this technology work at mass scale—another miracle in waiting.

Patrick Moorhead 32:23 (UTC+8)

It takes so much time, energy, and engineering. The complexity blows my mind, and your ability to do all this across such a wide power range is truly impressive. I’m not sure how many companies worldwide can achieve that.

People often say, “I can never get enough of this,” which is because we always want more, always want more amazing things. Then people start discussing pricing. But I see this as investment—Micron and other industry players invest rightly, because without it the innovation cycle would halt. I look forward to seeing what Micron’s investments bring next, not just in fab construction, but in technology. I believe robotics can drive 10x growth—it might become a gigantic growth market—even above and beyond what our current models assume. Of course, we need more evidence for timing.

Thank you very much for this conversation. Hard to believe it’s been a year since our last—so much has changed.